dc.description.abstract |
The increasing demand for communication facilities over the last decade have put
larger claims on the existing systems, due to higher demand. Data
communications plays an increasingly larger role, because more information has
to be transmitted at higher rates with greater reliability over exsisting channels,
with a limited bandwidth.
This project comprises the development of a complete trellis code modulation
transmitter which was executed in various phases.
The development of the transmitter includes the design and construction of the
encoder, digital-to-analog converters, balanced modulators, clock pulse
generator, summer and filter.
The 2/3 convolutional encoder produces three output bits for every two input bits.
The output of the encoder is not determined by the input bits only, but also by the
contents of the shift registers. This technique provides redundancy for the system
and is used to give a larger Euclidean distance between the adjacent signals in
order to limit the occurence of faults.
The encoder outputs are passed to two digital-to-analog converters, after which
the signals are modulated onto a carrier frequency of 1800 Hz. The outputs of the
modulators are summed and transmitted through a band pass filter, allowing a
3 kHz bandwidth .
The frequency of the 6,144 MHz crystal oscillator output is reduced through a
number of dividing circuits to provide the clock pulses required.
The encoder, clock pulse generator and pseudo-random data generator was
developed by the programming of programmable array logic (PAL) chips. A pseudo-random data generator, driven by pulses from a noise generator, was
developed to supply the transmitter with input bits for evaluation purposes. The
correct operation of the transmitter may be ascertained with the use of a logic
analyzer and digital oscilloscope.
Considerable information and expenence regarding the following aspects was
obtained in the course of this project:
• The operation of a trellis code modulation system, developed to obtain
nearly fault free communication over a channel with a limited bandwidth of
3 kHz.
• The operation of convolutional encoders and eight phase shift keying was
studied and sucessfully implemented.
• Programmingof 16R4 and 16R8 PALs with the use of JEDEC files.
• Increase of component density through the use of PAL technology, in which
one PAL was used to perform a number of functions.
• The operation of various computer programs and test equipment. |
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