Ontwikkeling van 'n outomatiese-toetsstelsel vir die evaluering van nie-programmeerbare digitale kringe

Abstract

Testing of electronic circuits can be divided into two steps, namely the identification of a fault and the isolation of the fault. Testing comprises the application of test stimuli (test vectors) to the unit under test (UUT) , the measurement of the output of the UUT and the evaluation of the obtained results. The stuck-at-value fault model was used to determine the faul t list. This model makes provision for the testing of each node in the circuit stuck-at-O and stuck-at-l. Test vectors were determined for each fault in the fault list. The most important aspect of test pattern generation is to ensure that a fault appearing at the input of a component produces an effect at the output of the component during testing. There are two steps in the testing of any node. Firstly the input must be determined so as to activate the node being tested (controllability) and secondly the effect of this must be transferred to the output of the circuit (observability) . A process named fault collapsing was used to reduce the size of the fault list of a few circuits. Fault collapsing consists of identifying indistinguishable and dominant faults. The evaluation of a circuit does not end with the determination of the test vectors. Fault information has to be included in the test set to determine the faulty node or component in the circuit. Fault diagnosis is done by means of a decision making process according to the test results obtained. Design for testability techniques (Ad hoc techniques, structural techniques and built-in self testing) have been investigated as means to simplify the development of a test set. The automatic test system hardware and software. (ATS) developed consists of The hardware of the ATS consists of a computer, interface and a fixture between the interface and the UUT. Any IBM PC/XT/AT or IBM compatible PC can be used for the ATS. A PC-14A interface card is used as interface between the computer and the UUT for the transfer of test vectors from the computer to the UUT and the collecting of results from the UUT. Provision has been made for the testing of cards equipped with an edge connector. The ATS software consist of the test program and a data base f or each circuit to be tested with the ATS. The test program is used for the composition of the test set as well as the execution of the tests. To evaluate the ATS two circuits have been built and a test set determined for each. All the faults, as given in the relevant fault lists, were simulated on the circuits and were identified during application of the test sets to the circuits. Since all nodes were included in the fault lists, and since all faults were identified, it can be said that a fault coverage of 100% has been obtained in both cases.